The present invention relates to nonvolatile memories.
A writing operation performed on a nonvolatile memory typically requires higher voltages. Higher voltages may require transistors with source/drain junctions having higher junction breakdown voltages. Such source/drain junctions undesirably increases the memory size.
Also, the lines carrying the higher voltages inject noise into other lines. It is therefore desirable to reduce the capacitance between the lines carrying the higher voltages and other lines, especially those carrying time sensitive signals. Also, it is desirable to reduce the parasitic capacitance associated with the high voltage lines in order to speed up charging these lines to the high voltages.
In addition, it is desirable to reduce the decoder area.